PNNL @ SC24
PNNL researchers will be showcasing their latest findings in high performance computing, cloud computing, and artificial intelligence at SC24.
Image by Timothy Holland | Pacific Northwest National Laboratory
Atlanta, GA
Are you attending SC24? Stop by our booth at the Job Fair on Tuesday, November 19 from 10:30 a.m. to 3:00 p.m.
Department of Energy Booth Activities
Featured Speaker: Antonino Tumeo
Bridging Python to Silicon: the SODA toolchain
Thursday, November 21 at 10:45 a.m. (EST)
Systems performing scientific computing, data analysis, and machine learning tasks have a growing demand for application-specific accelerators that can provide high computational performance while meeting strict size and power requirements. However, the algorithms and applications that need to be accelerated are evolving at a rate that is incompatible with manual design processes based on hardware description languages. Agile hardware design tools based on compiler techniques can address these limitations by quickly producing an application-specific integrated circuit (ASIC) accelerator starting from a high-level algorithmic description. In this talk I will present the software-defined accelerator (SODA) synthesizer, a modular and open-source hardware compiler that provides automated end-to-end synthesis from high-level software frameworks to ASIC implementation, relying on multilevel representations to progressively lower and optimize the input code. Our approach does not require the application developer to write any register-transfer level code, and it is able to reach up to 364 GFLOPS/W on typical convolutional neural network operators.
Technical Demonstration: Next-Generation AI Tools for Environmental Review and Permitting Efficiency
PNNL Presenters: Anastasia Bernat, Tim Vega, and Sai Munikoti
Tuesday, November 19 at 10:00 a.m. (EST) (Demo Station 2)
Thursday, November 21 at 10:00 a.m. (EST) (Demo Station 1)
The National Environmental Policy Act (NEPA) of 1969, is a bedrock and enduring environmental law in the United States with the express intent of fostering a productive harmony between humans and the environment for present and future generations. The NEPA statute and implementing regulations of the Council on Environmental Quality establish procedures requiring all federal agencies to consider and communicate the environmental effects in their planning and decisions to the public. Thus, agencies conduct environmental review and prepare a written document disclosing the potential environmental impact of proposed actions. Additionally, various studies are conducted by the scientific community to measure the impact of actions/projects on environment that eventually support NEPA review. Environmental data serves as a fundamental block in streamlining NEPA reviews where rich information contained in historical review and scientific documents could enable us to efficiently retrieve, analyze and find patterns that can inform future NEPA reviews. Currently documents are distributed across several agencies and its raw (PDF) form restricts from searchable and coupling with AI applications. We present two AI-ready data platforms, SearchNEPA and WindAssist that offers seamless access to past review and scientific documents.
Technical Demonstration: CACTUS: Harnessing Open-Source LLMs and Domain-Specific Tools for Advanced Chemistry Reasoning
PNNL Presenter: Rohith Varikoti
Wednesday, November 20 at 12:00 p.m. (EST) (Demo Station 2)
Thursday, November 21 at 10:00 a.m. (EST) (Demo Station 2)
The rapid advancement of large language models (LLMs) has revolutionized various domains, including chemistry and molecular discovery. However, the ability of LLMs to access and reason over domain-specific knowledge and tools remains a significant challenge. In this demo, we present CACTUS (Chemistry AI Agent Connecting Tool-Usage to Science), an enhanced version of the CACTUS agent that leverages open-source LLMs and integrates domain-specific tools to enable accurate and efficient reasoning and problem-solving in chemistry. In this demo, I will discuss the performance of state-of-the-art open-source LLMs, including Gemma-7b, Falcon-7b, MPT-7b, Llama3-8b, and Mistral-7b, on a comprehensive benchmark of chemistry questions. I will also highlight the impact of domain-specific prompting and hardware configurations on model performance, emphasizing the significance of prompt engineering and the feasibility of deploying smaller models on consumer-grade hardware without compromising accuracy. We will present real-world applications, including molecular discovery and material design, where CACTUS aids in hypothesis testing and validation, accelerating the discovery process and enabling data-driven decision-making.
Technical Demonstration: AI-guided Hypothesis Generation and Design of Catalysts with Complex Morphologies and Reaction Networks
PNNL Presenter: Sutanay Choudhury
Monday, November 18 at 7:00 p.m. (EST) (Demo Station 2)
We present an AI-driven framework for catalyst discovery, combining linguistic reasoning with quantum chemistry feedback. Our approach uses large language models (LLMs) to generate hypotheses and graph neural networks (GNNs) to evaluate 3D atomistic structures. The iterative process incorporates structural evaluation, reaction pathways, and stability assessments. Though experimental validation is still ongoing, the automated planning methods produced through this method could be used to guide the exploration of chemical space. This integration of language-guided reasoning and computational chemistry feedback has the potential to accelerate trustworthy catalyst discovery for sustainable chemical processes.
Read more about DOE booth activities on the DOE booth website!
PNNL presentations, workshops, and organized sessions
Sunday, November 17
Fourth International Symposium on Quantitative Codesign of Supercomputers
Workshop: 9:00 a.m. - 12:30 p.m. (EST)
Location: B315
PNNL Organizer(s): James (Jim) Ang
This symposium considers combining two methodologies—collaborative codesign and data-driven analysis—to realize the potential of supercomputing more fully. The rapidly evolving nature of HPC and its importance to scientific discovery make it an excellent candidate for both codesign processes and data-driven approaches. By narrowing in on these two proven methodologies with the broad-community attention of an SC’24 audience, we will address a host of identified challenges impacting HPC. Read more.
Third International Workshop on Cyber Security in High Performance Computing (S-HPC 2024)
Workshop: 9:00 a.m. - 5:30 p.m. (EST)
Location: B305
PNNL Organizer(s): Andrés Márquez, Joseph Manzano, Kevin Barker
Security in High-Performance Computing (HPC) has traditionally been an “operational” challenge (i.e., restricted access and usage to certified users). However, as HPC gradually permeates more areas of public interest, a hands-off approach to security aspects in favor of performance and power is becoming imprudent at best. Paired with HPC’s traditional role of early technology adoption, a new set of early target-worthwhile vulnerabilities are emerging that are not necessarily found in other computing scenarios that operate with more established technologies. Read more.
IA^3 2024 - 14th Workshop on Irregular Applications: Architectures & Algorithms
Workshop: 9:00 a.m. - 5:30 p.m. (EST)
Location: B310
PNNL Organizer(s): John Feo, Antonino Tumeo
Due to the heterogeneous datasets they process, data-intensive applications employ diverse methods and data structures, exhibiting irregular data accesses, control flows, and communication patterns. Modern data analytics applications additionally require supporting dynamic data structures, asynchronous control flows, and mixed parallel programming models. Read more.
Lamellar: A Rust-based Asynchronous Tasking and PGAS Runtime for High Performance Computing
Presentation: 10:50 a.m. - 11:10 a.m. (EST)
Workshop: The 7th Annual Parallel Applications Workshop, Alternatives To MPI+X (PAW-ATM 2024)
Location: B306
PNNL Author/Presenter(s): Ryan Friese, Roberto Gioiosa, Joseph Cottam, Erdal Mutlu, Gregory Roek, Polykarpos Thomadakis, Mark Raugas
The discussion around "safe'" programming languages has significantly increased in recent years. The White House Office of the National Cyber Director released a report in February 2024 calling on the technical community to work towards proactively reducing attack surfaces in cyberspace, in part, specifically by adopting memory safe programming languages. Read more.
Tools to Diagnose and Repair Floating-Point Errors in Heterogeneous Computing Hardware and Software
Tutorial: 1:30 p.m. - 5:00 p.m. (EST)
Location: B214
PNNL Presenter(s): Xinyi Li
Floating-point arithmetic is central to HPC and ML, with the variety of number formats, hardware platforms, and compilers exploding in this era of heterogeneity. This unfortunately increases the incidence of numerical issues including exceptions such as Infinity and NaN that can render the computed results unreliable or change control-flows, introduces excessive rounding that breaks the assumptions made in the numerical algorithm in use, and overall causes result non-reproducibility when code is optimized or ported across platforms. Read more.
Active Learning Surrogates for Integrating Electron Microscopy and Computational Insights from Simulations in Autonomous Experiments
Workshop: XLOOP 2024: The 6th Annual Workshop on Extreme-Scale Experiment-in-the-Loop Computing
Presentation: 2:25 p.m. - 2:50 p.m. (EST)
Location: B313
PNNL Author/Presenter(s): Maxim Ziatdinov
Artificial Intelligence, combined with simulations and experiments, has great potential in accelerating scientific discovery, yet bridging the gap between simulations and experiments remains challenging due to time and scale disparities. Read more.
Understanding and Predicting Cross-Application I/O Interference in HPC Storage Systems
Workshop: PDSW24: The 9th International Parallel Data Systems Workshop
Presentation: 2:30 p.m. - 3:00 p.m. (EST)
Location: B309
PNNL Author/Presenter(s): Bo Fang, Nathan Tallent
Floating-point arithmetic is central to HPC and ML, with the variety of number formats, hardware platforms, and compilers exploding in this era of heterogeneity. This unfortunately increases the incidence o
Silent Errors to Scientific Applications: Impacts of PFS Metadata Corruptions
Workshop: PDSW24: The 9th International Parallel Data Systems Workshop
Presentation: 4:25 p.m. - 4:30 p.m. (EST)
Location: B309
PNNL Author/Presenter(s): Bo Fang
High-performance computing (HPC) applications, such as Nyx, QMCPACK, and Montage, depend on parallel file systems (PFS) like Lustre, BeeGFS, and PVFS for reliable and efficient data management and access. However, PFS can fail due to hardware faults, software bugs, or power outages. Read more.
Rethinking Graph Analytics Benchmarks with the AGILE Workflows
Workshop: Machine Learning with Graphs in High-Performance Computing Environments
Presentation: time TBD
Location: B314
PNNL Author/Presenter(s): Marco Minutoli
In this talk, I will present the AGILE Workflows, a novel benchmark suite that
better captures the runtime properties of modern Graph Analytics pipelines. The
AGILE Workflows include 4 prototypical pipelines capturing key aspects of real
world analytics tasks.
The first workflow explores mixed analytics and learning on property graphs.
The second workflow is all about pattern matching. The third workflow is a
message reconstruction benchmark. The fourth workflow is a game on a multi layer
network.
I will discuss the design principles behind AGILE and how it can be used to
evaluate the performance of graph analytic platforms. I will also present experimental
results that show how these benchmarks run on current state-of-the-art systems.
Monday, November 18
Early Career Program
Event: 8:30 a.m. - 5:00 p.m. (EST)
Location: A404-A405
PNNL Participant(s): S.M. Ferdous, Dhruv Gajaria
The Early Career program is a series of workshop-style sessions and pre-conference webinars for people in the early stages of their careers. It is intended to help guide program participants in navigating a successful career path. Topics include funding, mentorship, self-promotion, communication skills, resiliency, and time management. Read more.
AI4S: 5th Workshop on Artificial Intelligence and Machine Learning for Scientific Applications
Workshop: 9:00 a.m. - 5:30 p.m. (EST)
Location: B313
PNNL Organizer(s): Gokcen Kestor
Artificial intelligence (AI) is a game-changing technology that has shown tremendous advantages and improvements in algorithms, implementation, and applications. We have seen many successful stories of applying AI to scientific applications. However, there are a number of problems remaining to be studied to enhance the usability of AI in scientific applications. Read more.
Co-design of Next-Generation HPC Systems for Artificial Intelligence and Mixed-Analytics
Workshop: 9:00 a.m. - 5:30 p.m. (EST)
Location: B314
PNNL Organizer(s): John Feo
Moore’s Law has permitted computer architects to double system performance every 18 to 24 months, enabling dense, compute-bound applications to achieve similar gains. However, an important class of data-driven applications dominated by artificial intelligence are evolving and scaling to models with trillion of parameters. Read more.
Scrutinizing Variables for Checkpoint Using Automatic Differentiation
Presentation: 11:30 a.m. - 11:50 a.m. (EST)
Location: B301
PNNL Author/Presenter(s): Luanzheng (Lenny) Guo
Checkpoint/Restart (C/R) saves the running state of the programs periodically, which consumes considerable time and system resources. We observe that not every piece of data is involved in the computation in typical HPC applications; such unused data should be excluded from checkpointing for better storage and compute efficiency. Read more.
Shifting Between Compute and Memory Bounds: A Compression-Enabled Roofline Model
Workshop: The 10th International Workshop on Data Analysis and Reduction for Big Scientific Data
Presentation: 11:40 a.m. - 11:55 a.m. (EST)
Location: B304
PNNL Author/Presenter(s): Luanzheng (Lenny) Guo, Nathan Tallent
This work proposes a compression-enabled roofline model to facilitate this adaptability with data compression techniques to balance and transform between computational and memory demands. This model enables applications to adjust in response to the specific strengths and limitations of the underlying hardware and system to optimize resource utilization. Read more.
An Efficient Checkpointing System for Large Machine Learning Model Training
Workshop: Communication, I/O, and Storage at Scale on Next-Generation Platforms – Scalable Infrastructures
Presentation: 12:00 p.m. - 12:30 p.m. (EST)
Location: B302
PNNL Author/Presenter(s): Luanzheng (Lenny) Guo
As machine learning models increase in size and complexity rapidly, the cost of checkpointing in ML training became a bottleneck in storage and performance (time). For example, the latest GPT-4 model has massive parameters at the scale of 1.76 trillion. Read more.
Optimizing the Weather Research and Forecasting Model with OpenMP Offload and Codee
Workshop: Eleventh Workshop on Accelerator Programming and Directives (WACCPD 2024)
Presentation: 5:00 p.m. - 5:18 p.m. (EST)
Location: B301
PNNL Author/Presenter(s): Koichi Sagakuchi, William I. Gustafson Jr.
Currently, the Weather Research and Forecasting model (WRF) utilizes shared memory (OpenMP) and distributed memory (MPI) parallelisms. To take advantage of GPU resources on the Perlmutter supercomputer at NERSC, we port parts of the computationally expensive routines of the Fast Spectral Bin Microphysics (FSBM) microphysical scheme to NVIDIA GPUs using OpenMP device offloading directives. Read more.
Tuesday, November 19
Energy and Carbon-Efficient Architectures
Session: 10:30 a.m. - 12:00 p.m. (EST)
Location: B311
PNNL Organizer(s): Antonino Tumeo
Efficient Weighted Graph Matching on GPUs
Session: Workflow Characterization and Optimization
Presentation: 11:30 a.m. - 12:00 p.m. (EST)
Location: B309
PNNL Author/Presenter(s): Sayan Ghosh, S.M. Ferdous, Mahantesh Halappanavar
Weighted matching identifies a maximal subset of edges in a graph with no common vertices. As a prototypical graph problem, matching has numerous applications in multi-level graph algorithms and machine learning. However, challenges arise in developing efficient, parallel graph matching methods on contemporary GPGPU systems due to general graph processing complexities, such as irregular memory access patterns and load imbalances. Read more.
HPC and Cloud Convergence: Drivers, Triggers, and Constraints
Birds of a Feather session: 12:15 p.m. - 1:15 p.m. (EST)
Location: B311
PNNL Author/Presenter(s): Roger Cass
This BoF delves into the evolving landscape of converged computing, where high-performance computing (HPC) and cloud resources are being integrated to meet the complex demands of modern scientific and technical computing. The increasing role of AI/ML is accelerating the need for convergence, but additional constraints such as sovereignty, the skill set of staff, and data center capacity limitations require consideration. Read more.
From AI to HPC: Bridging Gaps in Domain-Specific Compilation
Panel: 1:30 p.m. - 3:00 p.m. (EST)
Location: B313B-B314
PNNL Organizer(s): Gokcen Kestor
Major tech players were already investing heavily in domain-specific compilation for AI; a trend that was since turbocharged by the LLM revolution triggered by ChatGPT and its derivatives. With Python-based frontends for productivity, and MLIR as a robust foundational infrastructure, it could seem like AI outpaced traditional HPC in domain-specific compilation. Read more.
Tools and Strategies for Improving HPC Software Developer Productivity
Birds of a Feather session: 5:15 p.m. - 6:45 p.m. (EST)
Location: B209
PNNL Author/Presenter(s): Cameron Rutherford
This BoF brings together a panel of international HPC software development experts to discuss tools and techniques for enhancing HPC software developer productivity. Key themes include DevOps, programming models (OpenMP, RAJA, Kokkos, etc.), and development tools. Additionally, the integration of AI across these themes will be explored (e.g., is GitHub Copilot useful in HPC software development?). Read more.
Wednesday, November 20
HPC Meets Quantum Computing: When and How Will Applications Benefit? And Which Ones?
Panel Discussion: 10:30 a.m. - 12:00 p.m. (EST)
Location: B313B-B314
PNNL Panelist: Ang Li
Quantum computing is a quickly growing accelerator technology with more and more computer centers investigating the use of such systems as part of their long-term HPC strategy. However, while the potential computational power of quantum computers for targeted problems is generally known, concrete application use cases that specifically leverage both HPC and QC resources together are still a rarity. Read more.
HPC Graph Toolkits and the GraphBLAS Forum
Birds of a Feather session: 12:15 p.m. - 1:15 p.m. (EST)
Location: B207
PNNL Session Leader(s): Antonino Tumeo, John Feo
Government agencies, industry and academia are demanding a new generation of tools to efficiently solve large scale analytics problems in a variety of business, scientific and national security applications. This BoF gathers the community developing high-performance frameworks and workflows for large scale graph analytics to survey current approaches, identify new challenges and opportunities, and discuss interoperability of emerging infrastructures. Read more.
Thursday, November 21
AutoCheck: Automatically Identifying Variables for Checkpointing by Data Dependency Analysis
Session: Scaling and Checkpointing
Paper Presentation: 2:30 p.m. - 3:00 p.m. (EST)
Location: B309
PNNL Author/Presenter(s): Luanzheng (Lenny) Guo
Checkpoint/Restart (C/R) has been widely deployed in numerous HPC systems, Clouds, and industrial data centers, which are typically operated by system engineers. Nevertheless, there is no existing approach that helps system engineers without domain expertise and domain scientists without system fault tolerance knowledge identify those critical variables accounted for correct application execution restoration in a failure for C/R. Read more.
Friday, November 22
14th Workshop on Fault-Tolerance for HPC at eXtreme Scale (FTXS 2024)
Workshop: 8:30 a.m. - 12:00 p.m. (EST)
Location: B306
PNNL Organizer(s): Bo Fang
Increases in the number, variety, and complexity of components required to compose next-generation extreme-scale systems mean that systems will experience significant increases in aggregate fault rates, fault diversity, and fault complexity. Additionally, the growing importance of AI/ML workloads, increasing system heterogeneity, and the emergence of novel computing paradigms (neuromorphic, quantum) introduce fault tolerance issues that the research community has just begun to address. Read more.
Accelerating the Development and Use of Generative AI for Science and Engineering: The Trillion Parameter Consortium (TPC)
Workshop: 8:30 a.m. - 12:00 p.m. (EST)
Location: B309
PNNL Organizer(s): Neeraj Kumar
Realizing the promise of large-scale, 'foundation' models for scientific discovery, supporting activities ranging from self-driving laboratories to hypothesis generation, will require unprecedented scale of computation, with a multi-disciplinary task of preparing scientific data for model training. Read more.
PNNL Posters
Research Posters will be displayed Tuesday–Thursday, November 19–21, 2024. Location: B302-305.
Bringing it HOME: Analyzing contention hotspots across the memory hierarchy with low overhead
PNNL Author/Presenter(s): Dhruv Gajaria, Andrés Márquez
The increasing demand for computing in scientific research has given rise to memory contention and performance bottlenecks. Existing solutions often carry high overheads or lack the necessary detail for effective contention mitigation. To tackle these challenges, we are developing a powerful tool, HOME (Hierarchy-Oriented Memory Evaluation), which can efficiently identify contention by capturing detailed load-store traces and passing them to configurable memory hierarchy models. Read more.
Stalls and Memory Analysis on Fujitsu A64FX and NVIDIA Grace
PNNL Author/Presenter(s): Sayan Ghosh, Andrés Márquez
ARM-based multicore CPU systems are currently mainstream in contemporary High Performance Computing (HPC), comprising of 32-256 cores with cache hierarchies, demonstrating up to a TB/s of memory bandwidth (e.g., NVIDIA Grace superchip, Fujitsu A64FX, etc.). Popular memory band- width benchmarks such as STREAM depict comparable foot- prints across multicore ARM systems, multifarious application scenarios on the other hand can reveal remarkably different performance profiles across the systems. Read more.
Empowering Scientific Datasets with Large Language Models
PNNL Author/Presenter(s): Brian Chen, Alvin Hoang
The growing volume and complexity of scientific data pose significant challenges in data management, organization, and analysis. Our objective is to enhance the utilization of historical scientific datasets across various disciplines. Read more.
Profiling and Bottleneck Identification for Large Language Model Optimizations
PNNL Author/Presenter(s): Alvin Hoang, Brian Chen
Large language models (LLMs) have shown they can perform scientific tasks. They are capable of assisting researchers in data interpretation, instrument operation, knowledge synthesis, and hypothesis generation. However, LLMs must first be trained on a large dataset of scientific tasks and data. Read more.