Computer Scientist
High-Performance Computing
Computer Scientist
High-Performance Computing


Dr. Gokcen Kestor is a senior research scientist in the High-Performance Computing (HPC) group at PNNL, and also serves as an adjunct professor at the University of California Merced. Dr. Kestor's research solves computer science challenges in HPC software, such as scalability, energy efficiency, programmability, and portability. Their research in HPC system software mainly focuses on providing performance and energy efficiency on advanced HPC systems through runtime and compiler optimizations. Dr. Kestor has expertise in programming models, power/performance modeling, emerging architectures, compiler, and runtime systems. They are also active in the HPC research community as a program committee member of top-tier HPC conferences, and a co-organizer of the Women in High-Performance Computing workshops. Their master’s degree and doctorate in computer science was earned from the Universitat Politecnica de Catalunya in Spain.


  • Ph.D. in Computer Architecture, Technical University of Catalonia (Spain)
  • M.S. in Computer Science, Technical University of Catalonia (Spain)
  • B.S. in Computer Engineering, Dokuz Eylül University (Turkey)



  • Mutlu E., R. Tian, B. Ren, S. Krishnamoorthy, R. Gioiosa, J. Pienaar, and G. Kestor. 2022. "COMET: A Domain-Specific Compilation of High-Performance Computational Chemistry." In Proceedings of the 33rd International Workshop on Languages and Compilers for Parallel Computing, (LCPC 2020), October 14-16 2020, Virtual, Online. Lecture Notes in Computer Science, edited by B. Chapman, J. Moreira, 13149, 87-103. PNNL-SA-155440. doi:10.1007/978-3-030-95953-1_7


  • Tian R., L. Guo, J. Li, B. Ren, and G. Kestor. 2021. "A High Performance Sparse Tensor Algebra Compiler in MLIR." In IEEE/ACM 7th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC 2021), November 14, 2021, St. Louis, MO, 27-38. Piscataway, New Jersey: IEEE. PNNL-SA-168094. doi:10.1109/LLVMHPC54804.2021.00009


  • Dong W., Z. Xie, G. Kestor, and D. Li. 2020. "Smart-PGSim: Using Neural Network to Accelerate AC-OPF Power Grid Simulation." In International Conference for High Performance Computing, Networking, Storage, and Analysis (SC 2020), November 9-19, 2020, Atlanta, GA, 1, 879-893. Los Alamitos, California: IEEE Computer Society. PNNL-SA-155468. doi: 10.1109/SC41405.2020.00067


  • Liu J., D. Li, G. Kestor, and J.S. Vetter. 2019. "Runtime Concurrency Control and Operation Scheduling for High Performance Neural Network Training." In IEEE International Parallel and Distributed Processing Symposium (IPDPS 2019), May 20-24, 2019, Rio de Janeiro, Brazil, 188-199. Los Alamitos, California: IEEE Computer Society. PNNL-SA-141283. doi:10.1109/IPDPS.2019.00029
  • Mutlu B., G. Kestor, A. Cristal, O. Unsal, and S. Krishnamoorthy. 2019. "Ground-Truth Prediction to Accelerate Soft-Error Impact Analysis for Iterative Methods." In IEEE 26TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, AND ANALYTICS (HiPC 2019), December 17-20, 2019, Hyderabad, India, 333-344. Los Alamitos, California: IEEE Computer Society. PNNL-SA-148074. doi:10.1109/HiPC.2019.00048


  • Kestor G., S. Krishnamoorthy, and W. Ma. 2017. "Localized Fault Recovery for Nested Fork-Join Programs." In Proceedings of the 31st IEEE International Parallel & Distributed Processing Symposium (IPDPS 2017), May 29-June 2, 2017, Orlando, Florida, 397-408. Los Alamitos, California: IEEE Computer Society. PNNL-SA-123481. doi:10.1109/IPDPS.2017.75


  • Tallent N.R., K.J. Barker, R. Gioiosa, A. Marquez, G. Kestor, S. Song, and A. Tumeo, et al. 2016. "Assessing Advanced Technology in CENATE." In Proceedings of the IEEE International Conference on Networking, Architecture, and Storage (NAS 2016), August 8-10, 2016, Long Beach, California. Piscataway, New Jersey: IEEE. PNNL-SA-119257. doi:10.1109/NAS.2016.7549392


  • Kestor G., R. Gioiosa, and D. Chavarría-Miranda. 2015. "Prometheus: Scalable and Accurate Emulation of Task-Based Applications on Many-Core Systems." In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), March 29-31, 2015, Philadelphia, PA, 308-317. New York, New York: Institute of Electrical and Electronic Engineers. PNNL-SA-107887. doi:10.1109/ISPASS.2015.7095816


  • Gioiosa R., G. Kestor, and D.J. Kerbyson. 2014. "Online Monitoring System for Performance Fault Detection." Parallel Processing Letters 24, no. 4:Article No. 1442003. PNNL-SA-105705. doi:10.1142/S0129626414420031
  • Gioiosa R., G. Kestor, and D.J. Kerbyson. 2014. "Online Monitoring System for Performance Fault Detection." In IEEE International Parallel & Distributed Processing Symposium Workshops (IPDPSW 2014), May 19-23, 2014, Phoenix, Arizona, 1475-1484. Piscataway, New Jersey: IEEE. PNNL-SA-101741. doi:10.1109/IPDPSW.2014.165
  • Gioiosa R., G. Kestor, D.J. Kerbyson, and A. Hoisie. 2014. "Cross-Layer Self-Adaptive/Self-Aware System Software for Exascale Systems." In IEEE 26th International Symposium on Computer Architecture and High Performance Computing (SBAC PAD 2014), October 22-24, 2014, Paris, France, 326-333. Piscataway, New Jersey: IEEE. PNNL-SA-104751. doi:10.1109/SBAC-PAD.2014.29


  • Kestor G., R. Gioiosa, O. Unsal, A. Cristal, and M. Valero. 2012. "Enhancing the Performance of Assisted Execution Runtime Systems through Hardware/Software Techniques." In Proceedings of the 26th ACM International Conference on Supercomputing (ICS 2012), June 25-29, 2012, Venice, Italy, 153-162. New York, New York: Association for Computing Machinery. PNNL-SA-90922. doi:10.1145/2304576.2304598