April 11, 2023
Journal Article

Accelerating Matrix-Centric Graph Processing on GPUs through Bit-Level Optimizations


Even though it is well known that binary values are common in graph applications (e.g., adjacency matrix), how to leverage the phenomenon for efficiency has not yet been adequately explored. This paper presents a systematic study on how to unlock the potential of the bit-level optimizations of graph computations that involve binary values. It proposes a two-level representation named Bit-Block Compressed Sparse Row (B2SR) and presents a series of optimizations to the graph operations on B2SR by the intrinsics of modern GPUs. It additionally introduces Deep Reinforcement Learning (DRL) as an efficient way to best configure the bit-level optimizations on the fly. The DQN-based adaptive tile size selector with dedicated model training can reach 68% prediction accuracy. Evaluations on NVIDIA Pascal and Volta GPUs show that the optimizations bring up to 40× and 6555× for essential GraphBLAS kernels SpMV and SpGEMM, respectively, making GraphBLAS-based BFS accelerate up to 433×, SSSP, PR, and CC up to 35×, and TC up to 52×.

Published: April 11, 2023


Chen J., H. Sung, X. Shen, N.R. Tallent, K.J. Barker, and A. Li. 2023. Accelerating Matrix-Centric Graph Processing on GPUs through Bit-Level Optimizations. Journal of Parallel and Distributed Computing 177. PNNL-SA-179122. doi:10.1016/j.jpdc.2023.02.013