PNNL

Abstract

This paper proposes VecPAC -- a vectorizable and precision-aware coarse-grained reconfigurable array (CGRA) design. VecPAC integrates CGRA tiles with scalar functional units and specialized tiles with vector functional units that can trade off the number of vector lanes for the accuracy of the computation. We discuss the architecture design and present the related compilation framework. The experimental evaluation on a set of applications from three different domains (embedded, machine learning, and high-performance computing) shows that the hybrid design of VecPAC outperforms CGRAs with only scalar functional units by 1.48x, while providing higher scalability.