April 4, 2022
Research Highlight

Scalable Simulation of Quantum Circuits

Navigating noise on GPU-based HPC systems

quantum computing image

Quantum circuit simulation can reveal the impact of noise on noisy intermediate-scale quantum devices.

(Composite image by Donald Jorgensen | Pacific Northwest National Laboratory)

The Science                                

In the current stage of quantum computer development, processors are still very sensitive to their environment. This makes quantum computing “noisy” as the quantum bits—or qubits—they rely on are subject to decoherence. Architectural simulations can help researchers understand the impact of noise on quantum devices.

Researchers at Pacific Northwest National Laboratory (PNNL) developed the Northwest Quantum Simulator (NWQ-Sim) framework for density-matrix and state-vector simulations [1, 2] of quantum circuits. NWQ-Sim will play an integral role in supporting the development of an QCOR-Quantum Intermediate Representation (QIR)-NWQ-Sim pipeline, which will allow for the simulation of dynamic quantum circuits in various quantum programming languages. This pipeline is an effort currently supported by the software thrust of the Department of Energy (DOE) Office of Science Advanced Scientific Computing Research Quantum Science Center. The purpose is to build a capability to simulate various quantum programming language frontends on advanced DOE leadership computing facilities through this pipeline, with components from PNNL, Oak Ridge National Laboratory and Microsoft. Simulations are more time- and cost-effective, and more feasible than direct testing on current quantum devices.

The Impact

Quantum computing is currently thought to be in the noisy intermediate-scale quantum (NISQ) era. Quantum simulators can help users look beyond the limitations of the NISQ era and reveal the impact of noise on NISQ devices. Additionally, many quantum algorithms cannot be executed on current NISQ devices, but their output can be simulated. However, such quantum simulations are limited by memory capacity, communication bandwidth, and heterogeneity challenges on graphics processing unit (GPU)-based high performance computing (HPC) systems. NWQ-Sim overcomes such challenges through GPU-centric programming and direct connection of GPU high bandwidth memory or network-on-chip to network interface communications [3].


NWQ-Sim features two different simulators: a density-matrix simulator called DM-Sim [1] and a state-vector simulator called SV-Sim [2]. The two simulators share the same frontend C++ and Python interface, and backend supporting both CPUs and GPUs. SV-Sim contains GPU-centric programming to match the GPU-based accelerators now being employed by many HPC systems, including Summit, Perlmutter, Theta, and Spock, and the forthcoming exascale system, Frontier. This programming includes both non-interruptive, high-occupancy, long GPU execution and GPU-centric communication without CPU interference. SV-Sim outperforms other simulators, such as Qiskit, Cirq and QSharp. The simulator may be scaled up with a single node across multiple devices and scaled out with multiple nodes across CPU and GPU clusters.

The upcoming quantum system simulation pipeline will include NWQ-Sim, QCOR from Oak Ridge National Laboratory, and QIR from Microsoft. This pipeline will allow the simulation of dynamic quantum circuits rather than static circuits.

This research was presented at the NVIDIA GTC 2022 developer conference.


Ang Li
Advanced Computing, Mathematics and Data Division



This project was initially supported by the Quantum Algorithms, Software, and Architectures Initiative, a Laboratory Directed Research and Development program at PNNL, and later by the DOE Office of Science Advanced Scientific Computing Research Quantum Science Center in collaboration with Microsoft and Oak Ridge National Laboratory.  

Published: April 4, 2022

[1] Li A., O. Subasi, X. Yang, and S. Krishnamoorthy. 2020. "Density Matrix Quantum Circuit Simulation via the BSP Machine on Modern GPU Clusters." In International Conference for High Performance Computing, Networking, Storage and Analysis (SC2020), November 9-19, 2020, Atlanta, GA, 1-15. Piscataway, New Jersey:IEEE. PNNL-SA-143160. doi:10.1109/SC41405.2020.00017

[2] Li A., B. Fang, C.E. Granade, G. Prawiroatmodjo, B. Heim, M. Roetteler, and S. Krishnamoorthy. 2021. "SV-Sim: Scalable PGAS-based State Vector Simulation of Quantum Circuits." In Proceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC 2021), November 14-19, 2021, Virtual, Online, Art. No. 97. New York, New York:Association for Computing Machinery. PNNL-SA-161181. doi:10.1145/3458817.3476169

[3] Li A., S. Song, J. Chen, J. Li, X. Liu, N.R. Tallent, and K.J. Barker. 2020. "Evaluating Modern GPU Interconnect: PCIe, NVLink, NV-SLI, NVSwitch and GPUDirect." IEEE Transactions on Parallel and Distributed Systems 31, no. 1:94 - 110. PNNL-SA-141707. doi:10.1109/TPDS.2019.2928289