February 23, 2024

Conference Paper

## Examining the Feasibility of Modeling the Inner Current Loop of a Grid-Following Inverter in the Phasor-Based Solver

## Abstract

Historically, when modeling a grid-following (GFL) inverter in the phasor domain, the fast inner current loop is typically ignored. To achieve a more accurate modeling, the authors have attempted to model the inner current loop in the phasor domain, but experienced significant numerical stability issues. This paper conducts a detailed analysis and provides insight into the feasibility of modeling the inner current loop of a GFL inverter in the phasor domain. It points out that: a) because of the neglection of the inverter filter dynamic, the bandwidth of the inner current loop becomes infinite with typical parameters in the phasor domain, resulting in an inaccurate representation of the actual inner current loop, whose bandwidth is typically between 600 Hz to 2 kHz, and b) the relatively large simulation time step in the phasor simulation causes numerical stability issues when simulating such an inner current loop with an infinite bandwidth. Detailed electromagnetic (EMT) and phasor modeling, and frequency response analysis are performed to explain this phenomenon. The findings of this paper explain why it is inappropriate to model the fast current loop of a GFL inverter in the phasor domain.*
Published: February 23, 2024*

## Citation

Mohiuddin S., W. Du, and Y. Liu. 2023. Examining the Feasibility of Modeling the Inner Current Loop of a Grid-Following Inverter in the Phasor-Based Solver. In*Proceedings of the IEEE Power & Energy Society General Meeting (PESGM 2023), July 16-20, 2023, Orlando, FL*, 1-5. Piscataway, New Jersey:IEEE. PNNL-SA-179389. doi:10.1109/PESGM52003.2023.10252785