PNNL

Abstract

Modern optimizing compiler design integrates program transformation strategies aimed at reducing data movement to/from main memory by exploiting the data cache hierarchy. But in reality, the effect of these transformations on the actual cache miss count is ignored in compilers due to the lack of precise compile-time models of misses for hierarchical caches. The current state of practice for cache miss analysis is based on accurate simulation. However, simulation requires time proportional to the dataset/problem size as well as the number of distinct cache configurations of interest to be evaluated. This paper takes a fundamentally different approach, made possible by focusing on polyhedral programs with static control flow: instead of relying on costly simulation, this paper develops the first closed-form solution for exact modeling of misses in a set-associative cache hierarchy. It enabling simulation-less selection of program transformations at compile-time to optimize cache misses. A push-button tool implementing the approach is developed and used for extensive validation of the complete framework.