Computer Scientist
Computer Scientist

Biography

Ankur Limaye is a computer scientist in Pacific Northwest National Laboratory's NextGen Architecture Design group in the Physical and Computational Sciences Directorate. He completed his PhD in electrical and computer engineering at the University of Arizona in 2020. His research interests include computer architecture, hardware-software co-design, reconfigurable computing, RTL design, workload characterization, and performance analysis.

Disciplines and Skills

  • Computer Architecture
  • Embedded Systems
  • FPGA prototyping
  • RTL Design
  • Verilog
  • Workload Characterization

Education

  • PhD in electrical and computer engineering, University of Arizona 
  • MS in electrical engineering, National Institute of Technology
  • BE in electronics engineering technology, University of Mumbai

Publications

2025

  • Bohm Agostini N., G. Gozzi, M. Fiorito, C. Barone, S. Curzel, A.M. Limaye, and M. Minutoli, et al. 2025. "Extending High-Level Synthesis with AI/ML Methods." In Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2024), October 27-31, 2024, New York, NY, Paper No. 28. New York, New York:Association for Computing Machinery. PNNL-SA-202929. doi:10.1145/3676536.3689923
  • Varshika M.L., J. Hollenbach, N. Bohm Agostini, A.M. Limaye, A. Tumeo, and A. Das. 2025. "Online Learning for Dynamic Structural Characterization in Electron Energy Loss Spectroscopy." In Design, Automation & Test in Europe Conference (DATE 2025), March 31-April 2, 2025, Lyon, France, 1-7. Piscataway, New Jersey:IEEE. PNNL-SA-203900. doi:10.23919/DATE64628.2025.10992865
  • Ankur Limaye, Nicolas Bohm Agostini, Claudio Barone, Vito Giovanni Castellana, Michele Fiorito, Fabrizio Ferrandi, Andres Marquez, and Antonino Tumeo. 2025. A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems. In Proceedings of the 30th Asia and South Pacific Design Automation Conference (ASPDAC '25). Association for Computing Machinery, New York, NY, USA, 1016–1022. https://doi.org/10.1145/3658617.3697553

2024

  • Nicolas Bohm Agostini, Giovanni Gozzi, Michele Fiorito, Claudio Barone, Serena Curzel, Ankur Limaye, Marco Minutoli, Vito Giovanni Castellana, Joseph Manzano, Fabrizio Ferrandi, and Antonino Tumeo. 2025. Extending High-Level Synthesis with AI/ML Methods. Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design. Association for Computing Machinery, New York, NY, USA, Article 28, 1–6. https://doi.org/10.1145/3676536.3689923
  • Claudio Barone, Rishika Kushwah, Ankur Limaye, Vito Giovanni Castellana, Giovanni Gozzi, Michele Fiorito, Fabrizio Ferrandi, and Antonino Tumeo. 2024. To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated Accelerators. In Proceedings of the International Symposium on Memory Systems (MEMSYS '24). Association for Computing Machinery, New York, NY, USA, 210–218. https://doi.org/10.1145/3695794.3695815
  • A. Limaye et al., "Towards Automated Generation of Chiplet-Based Systems Invited Paper," 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), Incheon, Korea, Republic of, 2024, pp. 771-776, doi: 10.1109/ASP-DAC58780.2024.10473980.

2023

  • Vito Giovanni Castellana, Nicolas Bohm Agostini, Ankur Limaye, Vinay Amatya, Marco Minutoli, Joseph Manzano, Antonino Tumeo, Serena Curzel, Michele Fiorito, and Fabrizio Ferrandi. 2023. Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis. In Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASPDAC '23). Association for Computing Machinery, New York, NY, USA, 632–638. https://doi.org/10.1145/3566097.3568360

2022

  • N. B. Agostini et al., "Bridging Python to Silicon: The SODA Toolchain," in IEEE Micro, vol. 42, no. 5, pp. 78-88, 1 Sept.-Oct. 2022, doi: 10.1109/MM.2022.3178580. keywords: {Hardware;Optimization;Synthesizers;Codes;Hardware design languages;Kernel;Field programmable gate arrays;Compiler Techniques;MLIR;High-Level Synthesis;Hardware generation;Silicon Compiler},
  • S. Curzel et al., "End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators," in IEEE Transactions on Computers, vol. 71, no. 12, pp. 3074-3087, 1 Dec. 2022, doi: 10.1109/TC.2022.3211430. keywords: {Computer architecture;Synthesizers;Hardware;Codes;Parallel processing;Field programmable gate arrays;Optimization;High-level synthesis;data flow;end-to-end silicon compiler;high-level optimizations;MLIR},
  • S. Curzel et al., "From High-Level Frameworks to custom Silicon with SODA," 2022 IEEE Hot Chips 34 Symposium (HCS), Cupertino, CA, USA, 2022, pp. 1-13, doi: 10.1109/HCS55958.2022.9895593.
  • Nicolas Bohm Agostini, Serena Curzel, Ankur Limaye, Vinay Amatya, Marco Minutoli, Vito Giovanni Castellana, Joseph Manzano, Antonino Tumeo, and Fabrizio Ferrandi. 2022. The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited. In Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC '22). Association for Computing Machinery, New York, NY, USA, 1359–1362. https://doi.org/10.1145/3489517.3530628
  • Nicolas Bohm Agostini, Ankur Limaye, Marco Minutoli, Vito Giovanni Castellana, Joseph Manzano, Antonino Tumeo, Serena Curzel, and Fabrizio Ferrandi. 2022. SODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon. In Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design (ICCAD '22). Association for Computing Machinery, New York, NY, USA, Article 18, 1–7. https://doi.org/10.1145/3508352.3561101

2021

  • Zhang, Jeff, Bohm Agostini, Nicolas, Song, Shihao, Tan, Cheng, Limaye, Ankur M., Amatya, Vinay C., Manzano Franco, Joseph B., Minutoli, Marco, Castellana, Vito G., Tumeo, Antonino, Wei, Gu-Yeon, & Brooks, David (2021). Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis.
  • S. Curzel et al., "Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators," 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), Munich, Germany, 2021, pp. 1-7, doi: 10.1109/ICCAD51958.2021.9643474.
  • A. Limaye and T. Adegbija, "DOSAGE: Generating Domain-Specific Accelerators for Resource-Constrained Computing," 2021 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Boston, MA, USA, 2021, pp. 1-6, doi: 10.1109/ISLPED52811.2021.9502501.
  • Ankur Limaye, Antonino Tumeo, Tosiron Adegbija, Energy characterization of graph workloads, Sustainable Computing: Informatics and Systems, Volume 29, Part A, 2021, 100465, ISSN 2210-5379, https://doi.org/10.1016/j.suscom.2020.100465.
  • J. J. Zhang et al., "Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis," 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP), NJ, USA, 2021, pp. 218-225, doi: 10.1109/ASAP52443.2021.00040.

2020

  • R. Cordeiro, D. Gajaria, A. Limaye, T. Adegbija, N. Karimian and F. Tehranipoor, "ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 11, pp. 3373-3384, Nov. 2020, doi: 10.1109/TCAD.2020.3012169. keywords: {Electrocardiography;Authentication;Biometrics (access control);Timing;Feature extraction;Computer architecture;Side-channel attacks;Biometric authentication;domain-specific architectures (DSAs);electrocardiogram (ECG);energy efficient;Internet of Biometric Things (IoBT);Internet of Things (IoT);secure architectures;side-channel attacks},