PNNL

Abstract

This paper presents a two-stage current limiting control strategy with fault ride-through capability for the direct-droop-controlled grid-forming (GFM) inverters. The proposed approach comprises Stage 1 and Stage 2 current limiting controls. During faults, Stage 1 current limiting control instantly clamps the inverter output current magnitude to its maximum transient limit by blocking the switching pulses to the insulated-gate bipolar transistors (IGBTs) with the help of a hysteresis loop control, and Stage 2 current limiting control limits the inverter output current magnitude to its steady-state limit by regulating the amplitude and frequency of the modulating waveform utilizing the active and reactive current limiting control loops. By implementing the current limiting actions in two stages, this approach can effectively limit the over-current within a few cycles after the fault occurrence and ensure synchronism to the grid after long-term fault events. The efficacy of the proposed control approach is validated through electromagnetic transient (EMT) simulation results conducted on a single GFM inverter-based test system and the IEEE 39-bus test system with multiple GFM inverters in the PSCAD platform.