April 5, 2016
Report

Testsofa Design Details and Theory of Operation

Abstract

The Testsofa is used to explore the functioning of an integrated circuit. It characterizes pin functions via pin profiling, then serves as an interface to a Boss server which creates a finite state machine (FSM) model using branch exploration. This exploration is done via a stimulus/response process, which will be explained in the Internal Logic Testing section.

Revised: August 29, 2016 | Published: April 5, 2016

Citation

Miller C.H. 2016. Testsofa Design Details and Theory of Operation Richland, WA: Pacific Northwest National Laboratory.