September 5, 2025
Conference Paper

QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Architectures

Abstract

Quantum Error Correction (QEC) codes are essential for achieving fault-tolerant quantum computing (FTQC). However, their implementation faces significant challenges due to disparity between required dense qubit connectivity and sparse hardware architectures. Current approaches often either underutilize QEC circuit features or focus on manual designs tailored to specific codes and architectures, limiting their capability and generality. In response, we introduce QECC-Synth, an automated compiler for QEC code implementation that addresses these challenges. We leverage the ancilla bridge technique tailored to the requirements of QEC circuits and introduces a systematic classification of its design space flexibilities. We then formalize this problem using the MaxSAT framework to optimize these flexibilities. Evaluation shows that our method significantly outperforms existing methods while demonstrating broader applicability across diverse QEC codes and hardware architectures.

Published: September 5, 2025

Citation

Yin K., H. Zhang, X. Fang, Y. Shi, T.S. Humble, A. Li, and Y. Ding. 2025. QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Architectures. In Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2025), March 30-April 3, 2025, Rotterdam, Netherlands, 1, 876 - 890. New York, New York:Association for Computing Machinery. PNNL-SA-210260. doi:10.1145/3669940.3707236