High Performance Computing
Pacific Northwest National Laboratory
PO Box 999
Richland, WA 99352
Dr. Gioiosa is currently a research scientist at Pacific Northwest National Laboratory in the High Performance Computing group (Computational Science and Mathematics Division).
Roberto received his Ph.D. on "High performance computing clusters" from the University of Rome "Tor Vergata" in 2006. Prior to coming to PNNL, he was graduate student at Los Alamos National Laboratory (LANL) from April 2004 to June 2005, working on High Performance Computing (fault tolerance and performance analysis) in the context of the PERCS project. Roberto worked at BSC as post-doc in 2006-2008 and 2009-2012; at BSC he worked on Operating Systems for High Performance Computing systems and optimization for future processor architectures and was involved in several projects with IBM, SUN, the European Union and the European Space Agency. From September 2008 to September 2009 he was post-doc at IBM TJ Watson Research center, in the BlueGene system software group, where he worked on the operating system for next generation of supercomputers BG/Q.
- High performance computing
- system software (operating and runtime systems)
- computer architecture
- performance analysis of parallel applications
- power and resiliency analysis
- Kestor G, R Gioiosa, and D Chavarrķa-Miranda. 2015. "Prometheus: Scalable and Accurate Emulation of Task-Based Applications on Many-Core Systems." In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), March 29-31, 2015, Philadelphia, PA, pp. 308-317. Institute of Electrical and Electronic Engineers, New York, NY. doi:10.1109/ISPASS.2015.7095816
- Gioiosa R, DJ Kerbyson, and A Hoisie. 2014. "Evaluating Performance and Power Efficiency of Scientific Applications on Multi-threaded Systems." In Proceedings of E2SC 2014: 2nd International Workshop on Energy Efficient Supercomputing, November 16-21, 2014, New Orleans, Louisiana, pp. 11-20. IEEE Computer Society, LOS ALAMITOS, CA. doi:10.1109/E2SC.2014.15
- Gioiosa R, G Kestor, and DJ Kerbyson. 2014. "Online Monitoring System for Performance Fault Detection." Parallel Processing Letters 24(4):Article No. 1442003. doi:10.1142/S0129626414420031
- Gioiosa R, G Kestor, and DJ Kerbyson. 2014. "Online Monitoring System for Performance Fault Detection." In IEEE International Parallel & Distributed Processing Symposium Workshops (IPDPSW 2014), May 19-23, 2014, Phoenix, Arizona, pp. 1475-1484. IEEE , Piscataway, NJ. doi:10.1109/IPDPSW.2014.165
- Gioiosa R, G Kestor, DJ Kerbyson, and A Hoisie. 2014. "Cross-Layer Self-Adaptive/Self-Aware System Software for Exascale Systems." In IEEE 26th International Symposium on Computer Architecture and High Performance Computing (SBAC PAD 2014), October 22-24, 2014, Paris, France, pp. 326-333. IEEE, Piscataway, NJ. doi:10.1109/SBAC-PAD.2014.29
- Jimenez V, F Cazorla, R Gioiosa, A Buyuktosunoglu, P Bose, FP O'Connel, and BG Mealey. 2014. "Adaptive Prefetching on POWER7:? Improving Performance and Power Consumption." ACM Transaction on Parallel Computing 1(1):Article No. 4. doi:10.1145/2588889
- Kestor G, R Gioiosa, O Unsal, A Cristal, and M Valero. 2012. "Enhancing the Performance of Assisted Execution Runtime Systems through Hardware/Software Techniques." In Proceedings of the 26th ACM International Conference on Supercomputing (ICS 2012), June 25-29, 2012, Venice, Italy, pp. 153-162. Association for Computing Machinery, New York, NY. doi:10.1145/2304576.2304598
- Gioiosa R, and S Krishnamoorthy. 2012. "Operating System Support for Fine-Grained Task Migration." In Workshop on Exascale Operating Systems and Runtime Software, October 4-5, 2012, Washington DC. Argonne National Laboratory, Lemont, IL.
- Jimenez V, R Gioiosa, F Cazorla, A Buyuktosunoglu, P Bose, and F OConnell. 2012. "Making Data Prefetch Smarter: Adaptive Prefetching on POWER7." In Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques (PACT 2012), September 19-23, Minneapolis, Minnesota, pp. 137-146. Association for Computing Machinery, New York, NY. doi:10.1145/2370816.2370837