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Staff information


Eric Choi

Scientific & Computing Operations
Pacific Northwest National Laboratory
PO Box 999
MSIN: K8-91
Richland, WA 99352


Eric Choi is a member of the Instrument Development Laboratory (IDL), a team of engineers developing novel, cutting-edge software and hardware tools and systems supporting EMSL and PNNL research. Choi works on both hardware and software development for IDL. His primary expertise is in electrical engineering and computer science, involving microcontrollers, field programmable gate arrays (FPGAs), user interfaces, digital signal processors (DSPs), printed circuit boards, analog circuit design and digital circuit design. He focuses on multiple projects involving FPGAs, DSPs, and microcontrollers throughout PNNL and EMSL. These projects involve creating a user interface to interact with hardware, making it a simple process to use the hardware’s complete functionality. Choi has worked on a specific FPGA design to create an accurate timing system to capture time of flight (TOF) of particles. This system would use these TOFs to ablate particles by accurately firing a laser. Choi also has worked on a specific microcontroller project to create an aerosol sampler, a portable system that operates on a single AA battery, to sample air at set intervals and schedules. This system incorporates aerosol samples with GPS locations and other data such as accelerometer data, date, and time. With the Juvenile Salmon Acoustic Tracking System (JSATS), another project involving FPGAs, DSPs, and microcontrollers, the system captures acoustic signals in water and converts them to digital signals for analysis. Choi monitors analog signals converted to digital signals and checks for possible salmon acoustic tags. Based on captured information, saved files are analyzed for possible tags, hereby tracking salmon through dams.

Research Interests

  • FPGA design
  • Embedded programming
  • DSP
  • Electronic circuit design
  • Electronic circuit simulation
  • Electronic circuit fabrication
  • Digital circuits
  • Analog circuits
  • Data analysis and processing
  • User interfaces for systems
  • Hardware development
  • Software development

Education and Credentials

  • 2003: M. Eng., Electrical Engineering, Cornell University, Ithaca, New York.
  • 2002: B.S., Electrical Engineering, Cornell University, Ithaca, New York.
  • 2002: B.S., Computer Science, Cornell University, Ithaca, New York.

Awards and Recognitions

  • Serial Tap - R&D 100 Winner 2017

PNNL Publications


  • Choi EY, AE Flory, BL Lamarche, and MA Weiland. 2014. JSATS Detector Field ManualPNNL-22135, Pacific Northwest National Laboratory, Richland, WA. 


  • Deng Z, TJ Carlson, T Fu, H Ren, JJ Martinez, JR Myers, S Matzner, EY Choi, and AE Copping. 2013. "Design and implementation of a marine animal alert system to support Marine Renewable Energy." Marine Technology Society Journal 47(4):113-121.  doi:10.4031/MTSJ.47.4.2


  • Deng Z, MA Weiland, T Fu, TA Seim, BL Lamarche, EY Choi, TJ Carlson, and MB Eppard. 2011. "A Cabled Acoustic Telemetry System for Detecting and Tracking Juvenile Salmon: Part 2. Three-Dimensional Tracking and Passage Outcomes." Sensors 11(6):5661-5676.  doi:10.3390/s110605661
  • Weiland MA, Z Deng, TA Seim, BL Lamarche, EY Choi, T Fu, TJ Carlson, AI Thronas, and MB Eppard. 2011. "A cabled acoustic telemetry system for detecting and tracking juvenile salmon: Part 1. Engineering design and instrumentation." Sensors 11(6):5645-5660.  doi:10.3390/s110605645


  • Zelenyuk A, J Yang, DG Imre, and EY Choi. 2009. "Achieving Size Independent Hit-Rate in Single Particle Mass Spectrometry." Aerosol Science and Technology 43(4):305-310. 
  • Zelenyuk A, J Yang, EY Choi, and DG Imre. 2009. "SPLAT II: An Aircraft Compatible, Ultra-Sensitive, High Precision Instrument for In-Situ Characterization of the Size and Composition of Fine and Ultrafine Particles." Aerosol Science and Technology 43(5):411-424. 


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