Data Intensive Sci Computing
As a research scientist within the Center for Adaptive Supercomputing Software, or CASS, Morari is part of the PNNL team designing the PNNL Semantic Graph Engine Multi-threaded (SGEM). SGEM is based on the PNNL Global Memory Multi-threaded (GMT), a runtime system Morari and other scientists designed and developed to efficiently execute irregular applications on large-scale systems. He also has developed and designed a high-performance distributed string hash-map for SGEM.
In addition, Morari has contributed to several conference papers and journal articles. He has served as a program commitee member for the IA^3 Workshop and he has served as a reviewer for several international conferences.
Prior to joining PNNL, Morari was a resident student at Barcelona Supercomputing Center (Spain) and a research intern at the IBM T.J. Watson Research Center (New York).
- Big Data
- Large-scale Runtime Systems
- System Software for High Performance Computing
- Performance Modeling
Education and Credentials
- M.S., Computer Engineering, Tor Vergata University (Italy), 2009
- B.S., Computer Engineering, Roma Tre University (Italy), 2007
Awards and Recognitions
- IEEE International Parallel & Distributed Processing Symposium, 2012: Best Paper Award, "Evaluating the Impact of TLB Misses on Future HPC Systems."
- Morari A, VG Castellana, DJ Haglin, JT Feo, JR Weaver, A Tumeo, and O Villa. 2013. "Accelerating semantic graph databases on commodity clusters." In IEEE International Conference on Big Data (Big Data 2013), October 6-9, 2013, Silicon Valley, California, pp. 768-772. Institute of Electrical and Electronics Engineers , Piscataway, NJ. doi:10.1109/BigData.2013.6691650
- Chappell AR, S Choudhury, JT Feo, DJ Haglin, A Morari, S Purohit, KL Schuchardt, A Tumeo, JR Weaver, and O Villa. 2013. "Toward a Data Scalable Solution for Facilitating Discovery of Scientific Data Resources." In DISCS-2013: Proceedings of the International Workshop on Data-Intensive Scalable Computing Systems, November 18, 2013, Denver, CO, pp. 55-60. Association for Computing Machinery , New York, NY. doi:10.1145/2534645.2534655
- Morari A, A Tumeo, O Villa, S Secchi, and M Valero. 2012. "Efficient Sorting on the Tilera Manycore Architecture." In IEEE 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2012), October 24-26, 2012, New York, pp. 171-178. Institute of Electrical and Electronics Engineers , Piscataway, NJ. doi:10.1109/SBAC-PAD.2012.41